riscv/sifive-blocks
1
0
Fork 0
Code Releases Activity

Remove cloneTypes in favor of autoclonetype (#51)

Browse Source 
* Remove cloneTypes in favor of autoclonetype

* Consistently use private val for autoclonetype
This commit is contained in:
Jack Koenig
2018-03-04 10:29:51 -08:00
committed by Henry Cook
parent 00fbfb6dd8
commit 39287b9215
9 changed files with 12 additions and 40 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/main/scala/devices/gpio/GPIO.scala
View File

@ -8,7 +8,7 @@ import freechips.rocketchip.config.Parameters
import freechips.rocketchip.util.SynchronizerShiftReg
import freechips.rocketchip.regmapper._
import freechips.rocketchip.tilelink._
import freechips.rocketchip.util.{AsyncResetRegVec, GenericParameterizedBundle}
import freechips.rocketchip.util.AsyncResetRegVec
case class GPIOParams(address: BigInt, width: Int, includeIOF: Boolean = false)
@ -75,7 +75,7 @@ object BasePinToIOF {
// level, and we have to do the pinmux
// outside of RocketChipTop.
class GPIOPortIO(c: GPIOParams) extends GenericParameterizedBundle(c) {
class GPIOPortIO(private val c: GPIOParams) extends Bundle {
val pins = Vec(c.width, new EnhancedPin())
val iof_0 = if (c.includeIOF) Some(Vec(c.width, new IOFPin).flip) else None
val iof_1 = if (c.includeIOF) Some(Vec(c.width, new IOFPin).flip) else None