Logo
Explore Help
Sign In
riscv/rocket-chip
Watch 1
Star 0
Fork 0
Code Releases Activity
Files
8bb397a1b9b3d069aea7fd6845322f64045d7b10
rocket-chip/src/main/scala
T
History
Megan Wachs 15dc7f6760 JTAGVPI: remove it from Chisel as it is unused
2018-03-07 10:55:45 -08:00
..
amba
coreplex => subsystem
2018-02-21 14:42:24 -08:00
config
config: remove deprecated Parameters.root
2018-01-30 11:52:44 -08:00
devices
JTAGVPI: remove it from Chisel as it is unused
2018-03-07 10:55:45 -08:00
diplomacy
diplomacy: put full module + instance path into graphml Description
2018-02-21 14:43:47 -08:00
groundtest
subsystem: XSubsystemModule => XSubsystemModuleImp
2018-02-21 14:52:59 -08:00
interrupts
diplomacy: provide a val name for all LazyModule constructions
2017-12-01 11:28:21 -08:00
jtag
Fix JTAG cover description (#1248)
2018-02-23 12:13:31 -08:00
regmapper
DescribedReg: fix some imports
2018-03-06 11:02:10 -08:00
rocket
BUE: more verbose register descriptions
2018-03-05 12:02:42 -08:00
subsystem
subsystem: add some inter-wrapper buffer params
2018-02-23 15:31:18 -08:00
system
subsystem: XSubsystemModule => XSubsystemModuleImp
2018-02-21 14:52:59 -08:00
tile
Align RoCCIO with new cloneType (#1270)
2018-03-06 17:53:51 -08:00
tilelink
Bump chisel and firrtl (#1232)
2018-03-01 15:19:12 -08:00
unittest
coreplex => subsystem
2018-02-21 14:42:24 -08:00
util
Bump Chisel and FIRRTL for annotations refactor (#1261)
2018-03-07 10:22:38 -08:00
Powered by Gitea Version: 1.27.1 Page: 43ms Template: 6ms
Dark
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API