Howard Mao 6bf8f41cef make sure passthrough requests are treated as vm_enabled = false

2015-09-26 20:29:51 -07:00

..

arbiter.scala

Chisel3 compatibility fixes

2015-09-11 15:43:07 -07:00

btb.scala

Chisel3 compatibility fixes

2015-09-11 15:43:07 -07:00

consts.scala

Chisel3 compatibility: use BitPat for don't-cares

2015-07-28 02:48:49 -07:00

csr.scala

modify csr file to bring in line with HTIF changes

2015-09-22 10:10:57 -07:00

decode.scala

Use Seq, not Iterable, when traversal order matters

2015-07-29 00:24:58 -07:00

dpath_alu.scala

Chisel3 compatibility: use BitPat for don't-cares

2015-07-28 02:48:49 -07:00

fpu.scala

Fix storage of SP values in DP registers

2015-09-21 12:20:44 -07:00

icache.scala

Revert "replace remaining uses of Vec.fill"

2015-09-25 17:09:06 -07:00

idecode.scala

Chisel3 has different Vec semantics

2015-08-03 19:08:00 -07:00

instructions.scala

Chisel3 compatibility: use BitPat for don't-cares

2015-07-28 02:48:49 -07:00

multiplier.scala

Purge UInt := SInt assignments

2015-07-31 15:42:10 -07:00

nbdcache.scala

Revert "replace remaining uses of Vec.fill"

2015-09-25 17:09:06 -07:00

package.scala

Update to privileged architecture 1.7

2015-05-19 02:32:21 -07:00

ptw.scala

Chisel3 compatibility fixes

2015-09-11 15:43:07 -07:00

rocc.scala

Chisel3 compatibility changes

2015-07-27 12:42:20 -07:00

rocket.scala

make sure access to invalid physical address treated as exception

2015-09-22 10:11:43 -07:00

tile.scala

Chisel3: bulk connect is not commutative

2015-08-01 21:11:25 -07:00

tlb.scala

make sure passthrough requests are treated as vm_enabled = false

2015-09-26 20:29:51 -07:00

util.scala

Use Seq, not Iterable, when traversal order matters

2015-07-29 00:24:58 -07:00