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rocket-chip/src/main/scala/rocket
2017-08-12 15:28:03 -07:00
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ALU.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
AMOALU.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
Breakpoint.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
BTB.scala Fix BTB not being refilled on some indirect jumps 2017-07-26 02:13:43 -07:00
Consts.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
CSR.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
DCache.scala Only report ECC errors when the RAM was actually read 2017-08-12 15:28:03 -07:00
Decode.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
Events.scala Add method to print perf events 2017-07-25 15:19:16 -07:00
Frontend.scala Make I vs. D a static property of TLB, not an input pin 2017-08-08 11:54:47 -07:00
HellaCache.scala Add option to retime D$ way mux into subsequent pipeline stage 2017-08-01 23:59:20 -07:00
HellaCacheArbiter.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
IBuf.scala Roll back use of UIntToOH1 (#946) 2017-08-09 18:39:47 -07:00
ICache.scala Separate I$ parity error from miss signal 2017-08-04 16:59:21 -07:00
IDecode.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
Instructions.scala Add RVC instruction patterns 2017-07-25 15:19:16 -07:00
Multiplier.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
NBDcache.scala Make I vs. D a static property of TLB, not an input pin 2017-08-08 11:54:47 -07:00
package.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
PMP.scala Use UIntToOH1 (#921) 2017-08-03 14:55:39 -07:00
PTW.scala Get L2 TLB tag/parity check off the D$ arbitration path 2017-08-04 17:01:51 -07:00
RocketCore.scala Print out the compressed instruction when executing one 2017-08-07 17:21:53 -07:00
RVC.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
ScratchpadSlavePort.scala tilelink: remove obsolete addr_lo signal (#895) 2017-07-26 16:01:21 -07:00
SimpleHellaCacheIF.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
TLB.scala Don't report to the DTIM that data is cacheable 2017-08-08 11:55:04 -07:00
TLBPermissions.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00