Henry Cook 24c1235500 rocket: add address to tlb permissions require msgs

2018-01-18 10:31:51 -08:00

..

ALU.scala

Don't route branch comparison result through ALU output mux

2017-10-07 17:36:24 -07:00

AMOALU.scala

Refactor package hierarchy and remove legacy bus protocol implementations (#845)

2017-07-07 10:48:16 -07:00

Breakpoint.scala

Refactor package hierarchy and remove legacy bus protocol implementations (#845)

2017-07-07 10:48:16 -07:00

BTB.scala

Improve frontend branch prediction

2017-11-09 00:00:56 -08:00

BusErrorUnit.scala

Add cover points for BusErrorUnit (#1193)

2018-01-15 18:00:29 -08:00

Consts.scala

Refactor package hierarchy and remove legacy bus protocol implementations (#845)

2017-07-07 10:48:16 -07:00

CSR.scala

Add cover properties for ECALL exceptions.

2017-11-30 14:27:04 -08:00

DCache.scala

Reduce cases in which FENCE.I must flush D$

2018-01-05 13:58:14 -08:00

Decode.scala

Refactor package hierarchy and remove legacy bus protocol implementations (#845)

2017-07-07 10:48:16 -07:00

Events.scala

Add method to print perf events

2017-07-25 15:19:16 -07:00

Frontend.scala

tile: BaseTile refactor, pt 2

2018-01-02 15:37:31 -08:00

HellaCache.scala

Merge pull request #1177 from freechipsproject/dont-touch-2

2018-01-09 15:13:55 -08:00

HellaCacheArbiter.scala

Refactor package hierarchy and remove legacy bus protocol implementations (#845)

2017-07-07 10:48:16 -07:00

IBuf.scala

Improve frontend branch prediction

2017-11-09 00:00:56 -08:00

ICache.scala

tile: BaseTile refactor, pt 1

2017-12-26 11:04:15 -08:00

IDecode.scala

Refactor package hierarchy and remove legacy bus protocol implementations (#845)

2017-07-07 10:48:16 -07:00

Instructions.scala

Add RVC instruction patterns

2017-07-25 15:19:16 -07:00

Multiplier.scala

Refactor package hierarchy and remove legacy bus protocol implementations (#845)

2017-07-07 10:48:16 -07:00

NBDcache.scala

tilelink: split Acquire into Acquire{Block,Perm} (#1030)

2017-10-05 12:49:49 -07:00

package.scala

Refactor package hierarchy and remove legacy bus protocol implementations (#845)

2017-07-07 10:48:16 -07:00

PMP.scala

Move microarchitecture-neutral params from Rocket to Core

2017-10-03 17:34:18 -07:00

PTW.scala

tile: BaseTile refactor, pt 2

2018-01-02 15:37:31 -08:00

RocketCore.scala

Correctly check for virtual-address canonicalization

2018-01-02 18:41:25 -08:00

RVC.scala

Expand C.UNIMP correctly (#1052)

2017-10-12 14:00:14 -07:00

ScratchpadSlavePort.scala

tile: cake reduction

2018-01-02 17:49:08 -08:00

SimpleHellaCacheIF.scala

Refactor package hierarchy and remove legacy bus protocol implementations (#845)

2017-07-07 10:48:16 -07:00

TLB.scala

Enforce physical-address canonicalization

2018-01-02 18:47:30 -08:00

TLBPermissions.scala

rocket: add address to tlb permissions require msgs

2018-01-18 10:31:51 -08:00