riscv/rocket-chip
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Andrew Waterman 1b030777ce Remove vestigial control signal
2014-03-24 04:36:12 -07:00
rocket/src/main/scala
Remove vestigial control signal
2014-03-24 04:36:12 -07:00
Description
Rocket Chip Generator (https://github.com/freechipsproject/rocket-chip)
13 MiB
Languages
Scala 93.1%
C++ 2.1%
Python 2%
Makefile 1.2%
Verilog 0.8%
Other 0.7%