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Commit Graph

28 Commits

Author SHA1 Message Date
a3d99e5ba2 DescribedReg: fix some imports 2018-03-06 11:02:10 -08:00
8856953905 DescribedReg: move to regmapper 2018-03-05 16:12:14 -08:00
d13dc8ac2a RegFieldDesc: Emit enumerations if they exist 2018-02-28 09:42:25 -08:00
64d3731e45 RegFieldDesc: don't put characters into names that need to be sanitized 2018-02-15 13:25:06 -08:00
08acbe1a29 RegFieldDesc: Clean up both descriptions and JSON presentations 2018-02-11 23:57:57 -08:00
7abf6e1c8a RegMapper: Update cover props to use new RegFieldDesc objects 2018-02-10 13:17:38 -08:00
4ab1585a78 Register Field: Add a more verbose description object
Add versions of the RegField functions to take it in, and
update Example device to use it.
2018-02-10 13:17:18 -08:00
a749326deb Add cover points to registers (#1208) 2018-01-24 21:37:24 -08:00
8425086f98 Allow rwReg to pass name and description to RegField for documentation. 2018-01-05 16:59:58 -08:00
35506279af regmapper: fix d_ready => d_bits loop in RegField.bytes
RegField.bytes updates only those bytes which are written every cycle.
However, there was a bug that it would try to return the updated value on reads.
This led to another TL-spec violating combinational path, just like the Debug module.
2017-11-30 16:38:45 -08:00
b3bdf5eca6 RegField: default argument for .bytes 2017-10-10 19:49:35 -07:00
4d784ad693 add cloneType to RegisterWriteIO and RegisterReadIO (#874) 2017-07-18 18:52:31 -07:00
af3976aa67 regmapper: add byte-sized RegField helper function (#854) 2017-07-10 21:08:02 -07:00
177ccbb663 regfield: More explanatory requires so I don't have to RTFC and figure out what width actually was (#855) 2017-07-10 21:07:50 -07:00
4c595d175c Refactor package hierarchy and remove legacy bus protocol implementations (#845)
* Refactors package hierarchy.

Additionally:
  - Removes legacy ground tests and configs
  - Removes legacy bus protocol implementations
  - Removes NTiles
  - Adds devices package
  - Adds more functions to util package
2017-07-07 10:48:16 -07:00
2d8b2f4edd ReduceOthers: remove constants from the balanced AND tree 2017-06-23 00:28:05 -07:00
48611266fa diplomacy: use ReduceOthers in the RegMapper 2017-06-22 19:43:47 -07:00
3dfd584075 regmapper: remove the Pipe in the RegMapper Queue
With this pipe here, devices which declare concurrency > 0
actually accept transactions on the same cycle they complete
the previous one. This is unexpected behavior.
2017-04-19 21:37:37 -07:00
b7963eca4e copyright: ran scripts/modify-copyright 2016-11-27 22:15:43 -08:00
680a944f07 regmapper RegisterCrossing: safe AsyncQueues are overkill here 2016-10-14 18:28:31 -07:00
4e40f9bb59 tilelink2 Nodes: appease the PC police 2016-10-13 17:02:18 -07:00
76388117bb regmapper: detect improper reset sequencing in RegisterCrossing 2016-10-10 13:13:32 -07:00
b5f5ef69c1 regmapper: eliminate race condition in RegisterCrossing bypass 2016-10-10 13:13:32 -07:00
2f6985efd3 crossings: use flip not flip()
This seems to be the more common API
2016-10-10 13:13:31 -07:00
8c7d469a95 Revert "async_queue: Give names to all the registers which show up in the queue (#390)"
This reverts commit a84a961a39.

The changes to RegisterCrossing.scala were unneeded after application of this branch.
The name changes made to the AsyncQueue.scala are reapplied at the end of this branch.
2016-10-10 13:13:31 -07:00
b5d4b72313 register_crossing: Remove the need for AsyncScope by specifying the master clock and reset. (#393) 2016-10-09 15:51:23 -07:00
a84a961a39 async_queue: Give names to all the registers which show up in the queue (#390)
This is to aid debugging but even more so for backend constraint writers, who generally
need predictable names for registers to set false paths, etc.
2016-10-08 17:50:50 -07:00
f05298d9bc tilelink2: move general-purpose code out of tilelink2 package 2016-10-03 16:22:28 -07:00