  Colin SchmidtandAndrew Waterman
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a43ad522dc
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add clock override to tile constructor (#42)
useful to have upstream so that tape-outs can construct
rocket-chip to have cores on different clocks without
forking rocket
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2016-07-21 17:56:52 -07:00 |
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Colin SchmidtandAndrew Waterman
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e3816d5fc7
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set invalidate_lr in other rocc examples (#47)
This should fix https://travis-ci.org/ucb-bar/rocket-chip/jobs/137607305
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2016-06-14 16:59:37 -07:00 |
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Colin SchmidtandAndrew Waterman
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2c325151bf
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pass invalidate_lr through simple cache interface (#45)
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2016-06-09 17:22:36 -07:00 |
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Colin SchmidtandAndrew Waterman
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8516e38eb2
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remove implicit modulo addressing in FPU (#44)
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2016-06-09 11:33:33 -07:00 |
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Colin Schmidt
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90991014a0
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Merge pull request #19 from ucb-bar/multirocc
Add support for multiple RoCC accelerators
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2015-11-28 08:56:04 -05:00 |
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