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Commit Graph

37 Commits

Author SHA1 Message Date
Howard Mao
4ff1aea288 fix more Chisel3 deprecations 2016-01-14 14:55:45 -08:00
Henry Cook
2b977325e3 Make prefetch type available in a_type, issue probeInvalidates for putPrefetches 2015-11-16 23:26:13 -08:00
Henry Cook
64aaf71b06 L2AcquireTracker refactor to support merging Gets and Puts into Prefetches of the correct type.
Transaction metadata for primary and seconday misses now stored in the secondary miss queue.

Added BuiltInAcquireBuilder factory.
2015-11-16 18:10:09 -08:00
Henry Cook
7fa3eb95e3 refactor tilelink params 2015-10-14 12:13:37 -07:00
Henry Cook
31be6407ec Removed all traces of params 2015-10-14 00:23:28 -07:00
Howard Mao
ae3d96013a make TL -> NASTI converter ingest ClientUncachedTileLinkIO and move functionality to Unwrapper 2015-09-14 12:57:54 -07:00
Andrew Waterman
01fc61ba96 Don't construct so many Vecs 2015-08-05 18:43:59 -07:00
Andrew Waterman
0686bdbe28 Avoid cross-module references
You can't instantiate a Vec in one module and use it in another.
An idiosyncrasy of the Chisel2 implementation let this one slip by.
In this case, it's just a matter of using def instead of val.
2015-07-30 23:49:06 -07:00
Henry Cook
17072a0041 L2 Writeback bugfix 2015-03-10 01:15:03 -07:00
Henry Cook
df79e7ff8d secondary miss bug 2015-03-05 15:51:18 -08:00
Henry Cook
1bed6ea498 New metadata-based coherence API 2015-02-28 17:32:03 -08:00
Henry Cook
0c66e70f14 cleanup of conflicts; allocation bugfix 2015-02-06 13:20:44 -08:00
Henry Cook
6141b3efc5 uncached -> builtin_type 2015-02-02 01:02:06 -08:00
Henry Cook
3aa030f960 Support for uncached sub-block reads and writes, major TileLink and CoherencePolicy refactor. 2015-02-01 20:37:16 -08:00
Henry Cook
9ef00d187f %s/master/manager/g + better comments 2014-12-29 22:55:58 -08:00
Henry Cook
f234fe65ce Initial verison of L2WritebackUnit, passes MiT2 bmark tests 2014-12-19 03:03:53 -08:00
Henry Cook
ab39cbb15d cleanup DirectoryRepresentation and coherence params 2014-12-15 19:24:42 -08:00
Henry Cook
424df2368f 1R/W L2 data array?
Add TLDataBeats to new LLC; all bmarks pass
2014-12-12 17:05:21 -08:00
Henry Cook
3026c46a9c Finish adding TLDataBeats to uncore & hub 2014-12-12 17:04:52 -08:00
Henry Cook
a519a43f23 Merge branch 'master' into new-llc
Conflicts:
	src/main/scala/coherence.scala
	src/main/scala/memserdes.scala
	src/main/scala/tilelink.scala
2014-11-12 16:25:25 -08:00
Henry Cook
82155f333e Major tilelink revision for uncached message types 2014-11-11 17:36:55 -08:00
Henry Cook
35553cc0b7 NullDirectory sharers.count fix 2014-11-11 16:05:25 -08:00
Henry Cook
27c72e5eed nearly all isa tests pass 2014-10-23 21:50:03 -07:00
Henry Cook
044b19dbc1 Compiles and elaborates, does not pass asm tests 2014-10-15 11:46:35 -07:00
Henry Cook
86bdbd6535 new tshrs, compiles but does not elaborate 2014-10-07 22:33:10 -07:00
Henry Cook
394eb38a96 temp; converted voluntary wb tracker 2014-10-03 01:06:49 -07:00
Henry Cook
53b8d7b031 use new coherence methods in l2, ready to query dir logic 2014-09-20 18:01:14 -07:00
Henry Cook
149d51d644 more coherence API cleanup 2014-09-20 16:57:13 -07:00
Henry Cook
faed47d131 use thunk for dir info 2014-09-20 16:54:28 -07:00
Henry Cook
f7b1e23ead functional style on MuxBundle 2014-09-20 16:54:28 -07:00
Yunsup Lee
0b51d70bd2 add LICENSE 2014-09-12 15:31:38 -07:00
Henry Cook
3c329df7e7 refactor Metadata, clean and expand coherence API 2014-05-28 13:35:08 -07:00
Henry Cook
5613dc7d1b replaced Lists with Vecs 2014-04-18 17:26:56 -07:00
Henry Cook
fbca7c6bb3 refactor ioMem and associcated constants. merge Aqcuire and AcquireData 2014-04-10 12:35:43 -07:00
Henry Cook
bbf8010230 cleanups supporting uncore hierarchy 2014-01-31 15:59:21 -08:00
Henry Cook
ee98cd8378 new enum syntax 2013-09-10 10:54:51 -07:00
Henry Cook
3763cd0004 standardizing sbt build conventions 2013-08-15 15:57:16 -07:00