1
0
Commit Graph

12 Commits

Author SHA1 Message Date
Henry Cook
7e25749581 Groundwork for assoc cache implementation 2012-01-18 17:09:35 -08:00
Henry Cook
1d76255dc1 new chisel version jar and find and replace INPUT and OUTPUT 2012-01-18 14:39:57 -08:00
Andrew Waterman
addfe55735 add FPGA memory generator script 2012-01-13 18:19:08 -08:00
Andrew Waterman
938b142d64 require writes to memory to be uninterrupted 2012-01-03 18:41:53 -08:00
Andrew Waterman
ffe23a1ee8 fix WAW hazard handling 2012-01-02 00:25:11 -08:00
Andrew Waterman
f9160c53cf fixes for correct verilog generation 2011-12-29 23:46:21 -08:00
Andrew Waterman
d65e1a2eee vlsi verilog compiles now but doesn't simulate 2011-12-20 22:08:27 -08:00
Andrew Waterman
a8d0cd95e6 hellacache now works 2011-12-17 03:26:11 -08:00
Andrew Waterman
56c4f44c2a hellacache returns!
but AMOs are unimplemented.
2011-12-12 06:49:39 -08:00
Andrew Waterman
8308345364 work in progress on hellacache 2011-12-10 07:01:47 -08:00
Andrew Waterman
ce201559f3 Support cache->cpu nacks one cycle after request 2011-12-10 00:42:09 -08:00
Andrew Waterman
c01e1f1cef Don't replay from EX stage.
EX replays are now handled from MEM.  We may move them to WB.
2011-12-09 19:42:58 -08:00