riscv
/
rocket-chip
1
0
Fork 0
Code Releases Activity

Add jtag_vpi.c to sources for vsim 

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
This commit is contained in:
Schuyler Eldridge 2018-02-23 15:32:10 -05:00
parent 69b48b623a
commit d0e350976a
1 changed files with 1 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
vsim/Makefrag
View File

@ -25,6 +25,7 @@ sim_csrcs = \
$(base_dir)/csrc/SimDTM.cc \
$(base_dir)/csrc/SimJTAG.cc \
$(base_dir)/csrc/remote_bitbang.cc \
$(base_dir)/csrc/jtag_vpi.c
#--------------------------------------------------------------------
# Build Verilog