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Add jtag_vpi.c to sources for vsim

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Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
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Schuyler Eldridge 2018-02-23 15:32:10 -05:00
parent 69b48b623a
commit d0e350976a
1 changed files with 1 additions and 0 deletions
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vsim/Makefrag
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@ -25,6 +25,7 @@ sim_csrcs = \
$(base_dir)/csrc/SimDTM.cc \
$(base_dir)/csrc/SimJTAG.cc \
$(base_dir)/csrc/remote_bitbang.cc \
$(base_dir)/csrc/jtag_vpi.c
#--------------------------------------------------------------------
# Build Verilog