Add jtag_vpi.c to sources for vsim

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
This commit is contained in:
Schuyler Eldridge committed 2018-02-23 17:31:24 -05:00
1 parent 69b48b623a
commit d0e350976a
1 file changed
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@@ -25,6 +25,7 @@ sim_csrcs = \
$(base_dir)/csrc/SimDTM.cc \
$(base_dir)/csrc/SimJTAG.cc \
$(base_dir)/csrc/remote_bitbang.cc \
$(base_dir)/csrc/jtag_vpi.c
#--------------------------------------------------------------------
# Build Verilog