merge ALU left and right shifters
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@ -61,9 +61,10 @@ class ALU(implicit conf: RocketConfiguration) extends Component
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val shamt = Cat(io.in2(5) & (io.dw === DW_64), io.in2(4,0)).toUFix
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val shin_hi_32 = Mux(isSub(io.fn), Fill(32, io.in1(31)), UFix(0,32))
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val shin_hi = Mux(io.dw === DW_64, io.in1(63,32), shin_hi_32)
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val shin = Cat(shin_hi, io.in1(31,0))
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val shin_r = Cat(shin_hi, io.in1(31,0))
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val shin = Mux(io.fn === FN_SR || io.fn === FN_SRA, shin_r, Reverse(shin_r))
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val shout_r = (Cat(isSub(io.fn) & shin(63), shin).toFix >> shamt)(63,0)
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val shout_l = (shin << shamt)(63,0)
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val shout_l = Reverse(shout_r)
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val bitwise_logic =
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Mux(io.fn === FN_AND, io.in1 & io.in2,
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