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Merge pull request #406 from ucb-bar/incisive-fixes

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More Cadence Incisive fixes
This commit is contained in:
Scott Johnson 2016-10-24 10:48:24 -07:00 committed by GitHub
commit bc01f85164
1 changed files with 13 additions and 2 deletions
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15
vsrc/TestDriver.v
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@ -25,23 +25,30 @@ module TestDriver;
void'($value$plusargs("max-cycles=%d", max_cycles));
verbose = $test$plusargs("verbose");
// do not delete the line below.
// do not delete the lines below.
// $random function needs to be called with the seed once to affect all
// the downstream $random functions within the Chisel-generated Verilog
// code.
// $urandom is seeded via cmdline (+ntb_random_seed in VCS) but that
// doesn't seed $random.
rand_value = $random($urandom);
rand_value = $urandom;
rand_value = $random(rand_value);
if (verbose) begin
$fdisplay(stderr, "testing $random %0x", rand_value);
end
`ifdef DEBUG
if ($value$plusargs("vcdplusfile=%s", vcdplusfile))
begin
`ifdef VCS
$vcdplusfile(vcdplusfile);
$vcdpluson(0);
$vcdplusmemon(0);
`else
$fdisplay(stderr, "Error: +vcdplusfile is VCS-only; use +vcdfile instead");
$fatal;
`endif
end
if ($value$plusargs("vcdfile=%s", vcdfile))
@ -50,8 +57,12 @@ module TestDriver;
$dumpvars(0, testHarness);
$dumpon;
end
`ifdef VCS
`define VCDPLUSCLOSE $vcdplusclose; $dumpoff;
`else
`define VCDPLUSCLOSE $dumpoff;
`endif
`else
`define VCDPLUSCLOSE
`endif
end