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tilelink2: detect 1-bit overflow in register definitions

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This commit is contained in:
Wesley W. Terpstra 2016-09-02 22:48:00 -07:00
parent a1fc01fd6d
commit 8343070639
1 changed files with 1 additions and 1 deletions
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src/main/scala/uncore/tilelink2/RegMapper.scala
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@ -85,7 +85,7 @@ object RegMapper
val (reg, low, field) = flat(i) val (reg, low, field) = flat(i)
val high = low + field.width - 1 val high = low + field.width - 1
// Confirm that no register is too big // Confirm that no register is too big
require (high <= 8*bytes) require (high < 8*bytes)
val rimask = frontMask(high, low).orR() val rimask = frontMask(high, low).orR()
val wimask = frontMask(high, low).andR() val wimask = frontMask(high, low).andR()
val romask = backMask(high, low).orR() val romask = backMask(high, low).orR()