Don't report a TL error if overwriting a whole ITIM word
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@ -313,7 +313,7 @@ class ICacheModule(outer: ICache) extends LazyModuleImp(outer)
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}
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respValid := s2_slaveValid || (respValid && !tl.d.ready)
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val respError = RegEnable(s2_scratchpad_hit && s2_data_decoded.uncorrectable, s2_slaveValid)
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val respError = RegEnable(s2_scratchpad_hit && s2_data_decoded.uncorrectable && !(edge_in.get.hasData(s1_a) && s1_a.mask.andR), s2_slaveValid)
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when (s2_slaveValid) {
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when (edge_in.get.hasData(s1_a) || s2_data_decoded.correctable) { s3_slaveValid := true }
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def byteEn(i: Int) = !(edge_in.get.hasData(s1_a) && s1_a.mask(i))
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