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NastiTest should cycle through write ids

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This commit is contained in:
Howard Mao 2016-07-08 17:55:02 -07:00
parent d80c2f480f
commit 5a3d6a1583
1 changed files with 1 additions and 1 deletions
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groundtest/src/main/scala/nastitest.scala
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@ -44,7 +44,7 @@ class NastiGenerator(id: Int)(implicit val p: Parameters) extends Module
io.mem.aw.valid := (state === s_write_addr) io.mem.aw.valid := (state === s_write_addr)
io.mem.aw.bits := NastiWriteAddressChannel( io.mem.aw.bits := NastiWriteAddressChannel(
id = UInt(0), id = write_idx(nastiXIdBits - 1, 0),
addr = write_addr, addr = write_addr,
len = UInt(0), len = UInt(0),
size = UInt(log2Ceil(genWordBytes))) size = UInt(log2Ceil(genWordBytes)))