diff --git a/groundtest/src/main/scala/nastitest.scala b/groundtest/src/main/scala/nastitest.scala
index a540aea3..ef662464 100644
--- a/groundtest/src/main/scala/nastitest.scala
+++ b/groundtest/src/main/scala/nastitest.scala
@@ -44,7 +44,7 @@ class NastiGenerator(id: Int)(implicit val p: Parameters) extends Module
 
   io.mem.aw.valid := (state === s_write_addr)
   io.mem.aw.bits := NastiWriteAddressChannel(
-    id = UInt(0),
+    id = write_idx(nastiXIdBits - 1, 0),
     addr = write_addr,
     len = UInt(0),
     size = UInt(log2Ceil(genWordBytes)))