riscv/rocket-chip
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make vlsi use dram model by default

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This commit is contained in:
Andrew Waterman 2012-12-06 03:13:45 -08:00
parent d911e635d6
commit 10a6a42a4a
2 changed files with 2 additions and 2 deletions
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2
riscv-rocket

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Subproject commit b035b2385282db65c0e700bb4b5136dc3ebcda5d
Subproject commit 8c1b05f604e562d95e9ffeee57c570720cd16702

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uncore

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Subproject commit 5cfbf2bce844b3fec7dd3446dbf15960aba7cb55
Subproject commit bbe2066a56cac3400611ba86f1cd4395e900c278