make vlsi use dram model by default

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Andrew Waterman committed 2012-12-06 03:13:45 -08:00

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commit 10a6a42a4a

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riscv-rocket

+1 -1

Submodule riscv-rocket updated: b035b23852...8c1b05f604.

uncore

+1 -1

Submodule uncore updated: 5cfbf2bce8...bbe2066a56.