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rocket-chip/junctions/src/main/scala/addrmap.scala

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// See LICENSE for license details.
package junctions
import Chisel._
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import cde.{Parameters, Field}
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import scala.collection.mutable.HashMap
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case object PAddrBits extends Field[Int]
case object VAddrBits extends Field[Int]
case object PgIdxBits extends Field[Int]
case object PgLevels extends Field[Int]
case object PgLevelBits extends Field[Int]
case object ASIdBits extends Field[Int]
case object PPNBits extends Field[Int]
case object VPNBits extends Field[Int]
case object GlobalAddrMap extends Field[AddrMap]
case object GlobalAddrHashMap extends Field[AddrHashMap]
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trait HasAddrMapParameters {
implicit val p: Parameters
val paddrBits = p(PAddrBits)
val vaddrBits = p(VAddrBits)
val pgIdxBits = p(PgIdxBits)
val ppnBits = p(PPNBits)
val vpnBits = p(VPNBits)
val pgLevels = p(PgLevels)
val pgLevelBits = p(PgLevelBits)
val asIdBits = p(ASIdBits)
val addrMap = p(GlobalAddrHashMap)
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}
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case class MemAttr(prot: Int, cacheable: Boolean = false)
abstract class MemRegion {
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def align: BigInt
def size: BigInt
def numSlaves: Int
}
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case class MemSize(size: BigInt, align: BigInt, attr: MemAttr) extends MemRegion {
def numSlaves = 1
}
case class MemSubmap(size: BigInt, entries: AddrMap) extends MemRegion {
val numSlaves = entries.countSlaves
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val align = entries.computeAlign
}
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object AddrMapProt {
val R = 0x1
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val W = 0x2
val X = 0x4
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val RW = R | W
val RX = R | X
val RWX = R | W | X
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val SZ = 3
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}
class AddrMapProt extends Bundle {
val x = Bool()
val w = Bool()
val r = Bool()
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}
case class AddrMapEntry(name: String, region: MemRegion)
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case class AddrHashMapEntry(port: Int, start: BigInt, region: MemRegion)
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class AddrMap(entries: Seq[AddrMapEntry]) extends scala.collection.IndexedSeq[AddrMapEntry] {
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private val hash = HashMap(entries.map(e => (e.name, e.region)):_*)
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def apply(index: Int): AddrMapEntry = entries(index)
def length: Int = entries.size
def countSlaves: Int = entries.map(_.region.numSlaves).foldLeft(0)(_ + _)
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def computeSize: BigInt = new AddrHashMap(this).size
def computeAlign: BigInt = entries.map(_.region.align).foldLeft(BigInt(1))(_ max _)
override def tail: AddrMap = new AddrMap(entries.tail)
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}
object AddrMap {
def apply(elems: AddrMapEntry*): AddrMap = new AddrMap(elems)
}
class AddrHashMap(addrmap: AddrMap, start: BigInt = BigInt(0)) {
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private val mapping = HashMap[String, AddrHashMapEntry]()
private val subMaps = HashMap[String, AddrHashMapEntry]()
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private def genPairs(am: AddrMap, start: BigInt, startIdx: Int, prefix: String): (BigInt, Int) = {
var ind = startIdx
var base = start
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am.foreach { ame =>
val name = prefix + ame.name
base = (base + ame.region.align - 1) / ame.region.align * ame.region.align
ame.region match {
case r: MemSize =>
mapping += name -> AddrHashMapEntry(ind, base, r)
base += r.size
ind += 1
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case r: MemSubmap =>
subMaps += name -> AddrHashMapEntry(-1, base, r)
ind = genPairs(r.entries, base, ind, name + ":")._2
base += r.size
}}
(base, ind)
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}
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val size = genPairs(addrmap, start, 0, "")._1
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val sortedEntries: Seq[(String, BigInt, MemSize)] = {
val arr = new Array[(String, BigInt, MemSize)](mapping.size)
mapping.foreach { case (name, AddrHashMapEntry(port, base, region)) =>
arr(port) = (name, base, region.asInstanceOf[MemSize])
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}
arr.toSeq
}
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def nEntries: Int = mapping.size
def apply(name: String): AddrHashMapEntry = mapping.getOrElse(name, subMaps(name))
def subMap(name: String): (BigInt, AddrMap) = {
val m = subMaps(name)
(m.start, m.region.asInstanceOf[MemSubmap].entries)
}
def isInRegion(name: String, addr: UInt): Bool = {
val start = mapping(name).start
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val size = mapping(name).region.size
UInt(start) <= addr && addr < UInt(start + size)
}
def isCacheable(addr: UInt): Bool = {
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sortedEntries.filter(_._3.attr.cacheable).map { case (_, base, region) =>
UInt(base) <= addr && addr < UInt(base + region.size)
}.foldLeft(Bool(false))(_ || _)
}
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def isValid(addr: UInt): Bool = {
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sortedEntries.map { case (_, base, region) =>
addr >= UInt(base) && addr < UInt(base + region.size)
}.foldLeft(Bool(false))(_ || _)
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}
def getProt(addr: UInt): AddrMapProt = {
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val protForRegion = sortedEntries.map { case (_, base, region) =>
val inRegion = addr >= UInt(base) && addr < UInt(base + region.size)
Mux(inRegion, UInt(region.attr.prot, AddrMapProt.SZ), UInt(0))
}
new AddrMapProt().fromBits(protForRegion.reduce(_|_))
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}
}