rocket-chip/Makefrag

# check RISCV environment variable
ifndef RISCV
$(error Please set environment variable RISCV. Please take a look at README)
endif

MODEL := Top
PROJECT := rocketchip
CXX := g++
CXXFLAGS := -O1

SBT := java -Xmx2048M -Xss8M -XX:MaxPermSize=128M -jar sbt-launch.jar
SHELL := /bin/bash

CHISEL_ARGS := $(MODEL) --W0W --backend $(BACKEND) --configInstance $(PROJECT).$(CONFIG) --compileInitializationUnoptimized --targetDir $(generated_dir)

src_path = src/main/scala
default_submodules = . junctions uncore hardfloat rocket zscale
chisel_srcs = $(addprefix $(base_dir)/,$(addsuffix /$(src_path)/*.scala,$(default_submodules)))

disasm := 2>
which_disasm := $(shell which spike-dasm)
ifneq ($(which_disasm),)
	disasm := 3>&1 1>&2 2>&3 | $(which_disasm) $(DISASM_EXTENSION) >
endif

timeout_cycles = 100000000

#--------------------------------------------------------------------
# DRAMSim2
#--------------------------------------------------------------------

DRAMSIM_OBJS := $(patsubst %.cpp,%.o,$(wildcard $(base_dir)/dramsim2/*.cpp))
$(DRAMSIM_OBJS): %.o: %.cpp
	$(CXX) $(CXXFLAGS) -DNO_STORAGE -DNO_OUTPUT -Dmain=nomain -c -o $@ $<
$(sim_dir)/libdramsim.a: $(DRAMSIM_OBJS)
	ar rcs $@ $^

#--------------------------------------------------------------------
# Build Tests
#--------------------------------------------------------------------

%.hex:
	$(MAKE) -C $(dir $@) $(notdir $@)

%.riscv.hex: %
	$(MAKE) -C $(dir $@) $(notdir $@)
check RISCV envirnoment variable 2014-09-11 11:38:21 +02:00			`# check RISCV environment variable`
			`ifndef RISCV`
			`$(error Please set environment variable RISCV. Please take a look at README)`
			`endif`

integrate updated rocket/uncore 2012-10-19 02:51:41 +02:00			`MODEL := Top`
Streamline makefiles for more robust test dependency generation. Note: emulator/generated-src-debug no longer used 2015-07-28 09:23:31 +02:00			`PROJECT := rocketchip`
everything to get emulator working 2012-10-02 04:30:11 +02:00			`CXX := g++`
Speed up C++ compilation 2014-01-31 21:25:19 +01:00			`CXXFLAGS := -O1`
everything to get emulator working 2012-10-02 04:30:11 +02:00
print stack trace if elaboration fails 2012-11-20 14:39:48 +01:00			`SBT := java -Xmx2048M -Xss8M -XX:MaxPermSize=128M -jar sbt-launch.jar`
Massive update containing several months of changes from the now-defunct private chip repo. * Adds support for a L2 cache with directory bits for tracking L1 coherence (DefaultL2Config), and new metadata-based coherence API. * Additional tests. * New virtual memory implementation, priviliged architecture (1.7), custom CSRs, FDivSqrt unit * Updated TileLink protocol, NASTI protocol SHIMs. * Lays groundwork for multiple top-level memory channels, superscalar fetch. * Bump all submodules. 2015-06-26 08:17:35 +02:00			`SHELL := /bin/bash`
everything to get emulator working 2012-10-02 04:30:11 +02:00
Streamline makefiles for more robust test dependency generation. Note: emulator/generated-src-debug no longer used 2015-07-28 09:23:31 +02:00			`CHISEL_ARGS := $(MODEL) --W0W --backend $(BACKEND) --configInstance $(PROJECT).$(CONFIG) --compileInitializationUnoptimized --targetDir $(generated_dir)`

update for rocket-chip release 2014-09-01 05:26:55 +02:00			`src_path = src/main/scala`
Add new junctions repo as submodule (contains externally facing buses and peripherals). Bump all submodules. 2015-07-30 02:56:19 +02:00			`default_submodules = . junctions uncore hardfloat rocket zscale`
			`chisel_srcs = $(addprefix $(base_dir)/,$(addsuffix /$(src_path)/*.scala,$(default_submodules)))`
update for rocket-chip release 2014-09-01 05:26:55 +02:00
			`disasm := 2>`
Massive update containing several months of changes from the now-defunct private chip repo. * Adds support for a L2 cache with directory bits for tracking L1 coherence (DefaultL2Config), and new metadata-based coherence API. * Additional tests. * New virtual memory implementation, priviliged architecture (1.7), custom CSRs, FDivSqrt unit * Updated TileLink protocol, NASTI protocol SHIMs. * Lays groundwork for multiple top-level memory channels, superscalar fetch. * Bump all submodules. 2015-06-26 08:17:35 +02:00			`which_disasm := $(shell which spike-dasm)`
update for rocket-chip release 2014-09-01 05:26:55 +02:00			`ifneq ($(which_disasm),)`
tease out reference-chip specific stuff 2014-09-10 05:49:28 +02:00			`disasm := 3>&1 1>&2 2>&3 \| $(which_disasm) $(DISASM_EXTENSION) >`
update for rocket-chip release 2014-09-01 05:26:55 +02:00			`endif`

			`timeout_cycles = 100000000`

			`#--------------------------------------------------------------------`
			`# DRAMSim2`
			`#--------------------------------------------------------------------`

commit awesome vlsi/energy scripts 2013-05-01 11:58:53 +02:00			`DRAMSIM_OBJS := $(patsubst %.cpp,%.o,$(wildcard $(base_dir)/dramsim2/*.cpp))`
simplify c++ memory models; support +dramsim flag works for both vlsi and emulator 2012-12-04 16:04:26 +01:00			`$(DRAMSIM_OBJS): %.o: %.cpp`
			`$(CXX) $(CXXFLAGS) -DNO_STORAGE -DNO_OUTPUT -Dmain=nomain -c -o $@ $<`
commit awesome vlsi/energy scripts 2013-05-01 11:58:53 +02:00			`$(sim_dir)/libdramsim.a: $(DRAMSIM_OBJS)`
simplify c++ memory models; support +dramsim flag works for both vlsi and emulator 2012-12-04 16:04:26 +01:00			`ar rcs $@ $^`

update for rocket-chip release 2014-09-01 05:26:55 +02:00			`#--------------------------------------------------------------------`
			`# Build Tests`
			`#--------------------------------------------------------------------`

			`%.hex:`
			`$(MAKE) -C $(dir $@) $(notdir $@)`

			`%.riscv.hex: %`
			`$(MAKE) -C $(dir $@) $(notdir $@)`