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Switch to the new ML507Shell

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This enables synthesis for the first time!
This commit is contained in:
Klemens Schölhorn 2018-04-12 00:47:42 +02:00
parent 8e4eaf6603
commit 212821fe4d
3 changed files with 4 additions and 5 deletions
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2
.gitmodules vendored
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@ -6,4 +6,4 @@
url = https://github.com/sifive/sifive-blocks.git
[submodule "fpga-shells"]
path = fpga-shells
url = https://github.com/sifive/fpga-shells
url = https://git.tiband.de/riscv/fpga-shells.git

2
fpga-shells

@ -1 +1 @@
Subproject commit 9d02f530fc53e68fa952466d697509be70247fa2
Subproject commit e9625bf8ee21c467a8bb6df3f9304c17411c93b6

5
src/main/scala/unleashed/u500ml507devkit/FPGAChip.scala
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@ -10,8 +10,7 @@ import freechips.rocketchip.diplomacy._
import sifive.blocks.devices.gpio._
import sifive.blocks.devices.pinctrl.{BasePin}
import sifive.fpgashells.shell.xilinx.vc707shell._
import sifive.fpgashells.ip.xilinx.{IOBUF}
import sifive.fpgashells.shell.xilinx.ml507shell._
//-------------------------------------------------------------------------
// PinGen
@ -28,7 +27,7 @@ object PinGen {
//-------------------------------------------------------------------------
class U500ML507DevKitFPGAChip(implicit override val p: Parameters)
extends VC707Shell
extends ML507Shell
with HasDebugJTAG {
//-----------------------------------------------------------------------