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fpga-shells
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df8e6b8e8c81230ac09fd0d60c34f3882fb72f24
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Wesley W. Terpstra
df8e6b8e8c
xilinxvc707pciex1: use new node-style API and abstract crossing (
#13
)
2017-10-28 12:27:24 -07:00
src/main
/scala
xilinxvc707pciex1: use new node-style API and abstract crossing (
#13
)
2017-10-28 12:27:24 -07:00
xilinx
VC707 : update contraints file to match PCIe and MIG signal names now claimed directly from the IP
2017-10-23 17:27:36 -07:00
.gitignore
Initial commit for fpga-shells
2017-08-16 11:23:45 -07:00
Description
Freedom FPGA mappings (
https://github.com/sifive/fpga-shells
)
682
KiB
Languages
Scala
89.5%
Tcl
7.8%
Verilog
2%
Makefile
0.7%