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riscv
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fpga-shells
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Freedom FPGA mappings (
https://github.com/sifive/fpga-shells
)
23
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682
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Scala
89.5%
Tcl
7.8%
Verilog
2%
Makefile
0.7%
d8e50c7646
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Wesley W. Terpstra
d8e50c7646
TLToAXI4: remove now unnecessary argument (
#10
)
2017-10-12 14:37:21 -07:00
src/main
/scala
TLToAXI4: remove now unnecessary argument (
#10
)
2017-10-12 14:37:21 -07:00
xilinx
Restructure Tcl script entrypoint.
2017-10-04 14:15:39 -07:00
.gitignore
Initial commit for fpga-shells
2017-08-16 11:23:45 -07:00