riscv/fpga-shells
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Freedom FPGA mappings (https://github.com/sifive/fpga-shells)
24 Commits 2 Branches 0 Tags 682 KiB
Scala 89.5%
Tcl 7.8%
Verilog 2%
Makefile 0.7%
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Henry Styles 61b167e8d9 VC707 : use IO bundles directly from the PCIe and MIG devices instead of redeclaring signals
2017-10-23 16:53:59 -07:00
src/main/scala VC707 : use IO bundles directly from the PCIe and MIG devices instead of redeclaring signals 2017-10-23 16:53:59 -07:00
xilinx Restructure Tcl script entrypoint. 2017-10-04 14:15:39 -07:00
.gitignore Initial commit for fpga-shells 2017-08-16 11:23:45 -07:00