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riscv/fpga-shells
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Henry StylesandWesley W. Terpstra 0fdbb778bf VC707 Shell : move DebugJTAG pins and connect function into a separate mix-in
2018-02-08 07:21:44 -08:00
src/main/scala
VC707 Shell : move DebugJTAG pins and connect function into a separate mix-in
2018-02-08 07:21:44 -08:00
xilinx
VC707 JTAG support throught XM105 FMC or reuse of LCD header
2018-02-08 07:21:44 -08:00
.gitignore
Initial commit for fpga-shells
2017-08-16 11:23:45 -07:00
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Description
Freedom FPGA mappings (https://github.com/sifive/fpga-shells)
682 KiB
Languages
Scala 89.5%
Tcl 7.8%
Verilog 2%
Makefile 0.7%
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