riscv/fpga-shells
1
0
Fork 0
Code Releases Activity
18 Commits 2 Branches 0 Tags 682 KiB
bf48e2c7c4
Commit Graph

3 Commits

Author SHA1 Message Date
Henry Styles
97e628639a Use a file instead of environment variable to pass VSRCS into Vivado 2017-09-19 14:12:23 -07:00
Henry Styles
9f75e6eb59 Support both 4G and 1GB DIMM configuration for VC707 
Generate IP TCL and MIG projects from the Chisel blackboxes
 2017-09-08 15:52:53 -07:00
Shreesha Srinath
ab8cf0775f Initial commit for fpga-shells 2017-08-16 11:23:45 -07:00