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VGA-Terminal für ML507
5 Commits 1 Branch 0 Tags 560 KiB
VHDL 100%
ea6b3418de
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Klemens Schölhorn ea6b3418de Add the actual init sequence for clocks <= 65 MHz
2017-11-23 02:12:25 +01:00
ipcore_dir Import existing project for displaying images through DVI on the ml507 2017-11-13 04:43:04 +01:00
.gitignore Import existing project for displaying images through DVI on the ml507 2017-11-13 04:43:04 +01:00
clock_source.vhd Import existing project for displaying images through DVI on the ml507 2017-11-13 04:43:04 +01:00
dvi_test.xise Fixup i2c init module 2017-11-22 04:09:01 +01:00
i2c_master.vhd Import existing project for displaying images through DVI on the ml507 2017-11-13 04:43:04 +01:00
init_ch7301c.ucf Add the actual init sequence for clocks <= 65 MHz 2017-11-23 02:12:25 +01:00
init_ch7301c.vhd Add the actual init sequence for clocks <= 65 MHz 2017-11-23 02:12:25 +01:00
main.ucf Import existing project for displaying images through DVI on the ml507 2017-11-13 04:43:04 +01:00
main.vhd Import existing project for displaying images through DVI on the ml507 2017-11-13 04:43:04 +01:00
vga_test.vhd Import existing project for displaying images through DVI on the ml507 2017-11-13 04:43:04 +01:00
vga.vhd Import existing project for displaying images through DVI on the ml507 2017-11-13 04:43:04 +01:00