This website requires JavaScript.
Explore
Help
Sign In
riscv
/
sifive-blocks
Watch
1
Star
0
Fork
0
You've already forked sifive-blocks
Code
Releases
Activity
120
Commits
1
Branch
0
Tags
e2695500cda1dd9332f17451452aea0c054920da
Go to file
Code
Clone
HTTPS
Tea CLI
Open with VS Code
Open with VSCodium
Open with Intellij IDEA
Download ZIP
Download TAR.GZ
Download BUNDLE
Megan Wachs
e2695500cd
Merge pull request
#41
from sifive/pwm_invert
...
PWM: Add the ability to invert the output directly in PWM
2017-10-05 16:32:26 -07:00
src/main
/scala
PWM: Add the ability to invert the output directly in PWM (without GPIO pinmux)
2017-10-02 15:08:06 -07:00
vsrc
Updates to go with the fpga-shells directory
2017-08-17 18:12:49 -07:00
.gitignore
Add /target to .gitignore.
2016-11-30 13:29:54 -08:00
LICENSE
Initial commit.
2016-11-29 04:08:44 -08:00
Description
Freedom RTL blocks (
https://github.com/sifive/sifive-blocks
)
280
KiB
Languages
Scala
99.8%
Verilog
0.2%