riscv/sifive-blocks
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Freedom RTL blocks (https://github.com/sifive/sifive-blocks)
120 Commits 1 Branch 0 Tags 280 KiB
Scala 99.8%
Verilog 0.2%
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Megan Wachs e2695500cd Merge pull request #41 from sifive/pwm_invert 
PWM: Add the ability to invert the output directly in PWM
2017-10-05 16:32:26 -07:00
src/main/scala PWM: Add the ability to invert the output directly in PWM (without GPIO pinmux) 2017-10-02 15:08:06 -07:00
vsrc Updates to go with the fpga-shells directory 2017-08-17 18:12:49 -07:00
.gitignore Add /target to .gitignore. 2016-11-30 13:29:54 -08:00
LICENSE Initial commit. 2016-11-29 04:08:44 -08:00