Wesley W. Terpstra 46aa6b0ac4 devices: include DTS meta-data

2017-03-02 20:39:30 -08:00

src/main/scala

devices: include DTS meta-data

2017-03-02 20:39:30 -08:00

vsrc

Initial commit.

2016-11-29 04:08:44 -08:00

.gitignore

Add /target to .gitignore.

2016-11-30 13:29:54 -08:00

LICENSE

Initial commit.

2016-11-29 04:08:44 -08:00

Description

Freedom RTL blocks (https://github.com/sifive/sifive-blocks)

280 KiB

Languages

Scala 99.8%

Verilog 0.2%