riscv/sifive-blocks
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Use NonBlockingEnqueue for terminal writes

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This provides feedback to the programm if the last value was already
printed to the terminal. If not, new values are ignored (unchanged).
This commit is contained in:
Klemens Schölhorn 2018-05-14 20:05:14 +02:00
parent 48d8524c4a
commit 88f1cbe420
1 changed files with 2 additions and 12 deletions
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14
src/main/scala/devices/terminal/Terminal.scala
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@ -10,7 +10,7 @@ import freechips.rocketchip.regmapper._
import freechips.rocketchip.subsystem.{BaseSubsystem} import freechips.rocketchip.subsystem.{BaseSubsystem}
import freechips.rocketchip.tilelink._ import freechips.rocketchip.tilelink._
import freechips.rocketchip.util.AsyncQueue import freechips.rocketchip.util.AsyncQueue
import sifive.blocks.util.NonBlockingEnqueue
case class TerminalParams ( case class TerminalParams (
address: BigInt address: BigInt
@ -69,18 +69,8 @@ trait TerminalRegModule extends MultiIOModule with HasRegMap {
term.io.write_data := crossing.io.deq.bits term.io.write_data := crossing.io.deq.bits
crossing.io.deq.ready := Bool(true) // terminal can read at every cycle crossing.io.deq.ready := Bool(true) // terminal can read at every cycle
val writer_fn = (valid: Bool, data: UInt) => {
crossing.io.enq.valid := valid
crossing.io.enq.bits := data
Bool(true) // discards values if queue is full (see NonBlockingEnqueue)
}
regmap( regmap(
0 -> Seq ( 0 -> NonBlockingEnqueue(crossing.io.enq)
RegField.w(8, writer_fn, RegFieldDesc(
"write", "Write an ASCII character to the terminal."
))
)
) )
} }