Renamed i2cDevices to i2c
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@ -8,7 +8,7 @@ import uncore.tilelink2.TLFragmenter
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trait PeripheryI2C {
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this: TopNetwork { val i2cConfigs: Seq[I2CConfig] } =>
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val i2cDevices = i2cConfigs.zipWithIndex.map { case (c, i) =>
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val i2c = i2cConfigs.zipWithIndex.map { case (c, i) =>
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val i2c = LazyModule(new TLI2C(c))
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i2c.node := TLFragmenter(peripheryBusConfig.beatBytes, cacheBlockBytes)(peripheryBus.node)
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intBus.intnode := i2c.intnode
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@ -27,7 +27,7 @@ trait PeripheryI2CModule {
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val outer: PeripheryI2C
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val io: PeripheryI2CBundle
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} =>
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(io.i2cs zip outer.i2cDevices).foreach { case (io, device) =>
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(io.i2cs zip outer.i2c).foreach { case (io, device) =>
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io <> device.module.io.port
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}
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}
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