Bug fix: arbLost should be asserted when bitState =/= s_bit_idle (#49)
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@ -202,7 +202,7 @@ trait HasI2CModuleContents extends MultiIOModule with HasRegMap {
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s_bit_wr_a :: s_bit_wr_b :: s_bit_wr_c :: s_bit_wr_d :: Nil) = Enum(UInt(), 18)
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val bitState = Reg(init = s_bit_idle)
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val arbLost = Reg(init = false.B, next = (sdaChk && !sSDA && sdaOen) | ((bitState === s_bit_idle) && stopCond && !bitCmdStop))
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val arbLost = Reg(init = false.B, next = (sdaChk && !sSDA && sdaOen) | ((bitState =/= s_bit_idle) && stopCond && !bitCmdStop))
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// bit FSM
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when (arbLost) {
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