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Flipped polarity of output enables to match Guava pins logic

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This commit is contained in:
Alex Solomatnikov 2017-02-09 11:37:40 -08:00
parent 72e4b60d81
commit 095cb158dd
1 changed files with 2 additions and 2 deletions
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src/main/scala/devices/i2c/I2C.scala
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@ -182,10 +182,10 @@ trait I2CModule extends Module with HasI2CParameters with HasRegMap {
} }
val sclOen = Reg(init = true.B) val sclOen = Reg(init = true.B)
io.port.scl.oe := sclOen io.port.scl.oe := !sclOen
val sdaOen = Reg(init = true.B) val sdaOen = Reg(init = true.B)
io.port.sda.oe := sdaOen io.port.sda.oe := !sdaOen
val sdaChk = Reg(init = false.B) // check SDA output (Multi-master arbitration) val sdaChk = Reg(init = false.B) // check SDA output (Multi-master arbitration)