Flipped polarity of output enables to match Guava pins logic
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@ -182,10 +182,10 @@ trait I2CModule extends Module with HasI2CParameters with HasRegMap {
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}
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val sclOen = Reg(init = true.B)
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io.port.scl.oe := sclOen
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io.port.scl.oe := !sclOen
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val sdaOen = Reg(init = true.B)
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io.port.sda.oe := sdaOen
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io.port.sda.oe := !sdaOen
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val sdaChk = Reg(init = false.B) // check SDA output (Multi-master arbitration)
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