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riscv
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rocket-chip
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fb5c38c186f5dfd03dc4c731d045f01107511a0f
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Andrew Waterman
fb5c38c186
Handle invalidate_lr in cache arbiter, not tile
2016-04-27 11:22:04 -07:00
rocket
Handle invalidate_lr in cache arbiter, not tile
2016-04-27 11:22:04 -07:00
Description
Rocket Chip Generator (
https://github.com/freechipsproject/rocket-chip
)
13
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Scala
93.1%
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2.1%
Python
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0.7%