Henry Styles f7330028cc Add optional frontbus for peripherals mastering into SBus. Switch FF and Buffer order on non-tile masters into SBus. Buffer non-L2 side of splitter		2017-08-30 14:22:49 -07:00
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amba	tilelink: Error device supports Acquire	2017-07-27 18:32:58 -07:00
config	Refactor package hierarchy and remove legacy bus protocol implementations (#845)	2017-07-07 10:48:16 -07:00
coreplex	Add optional frontbus for peripherals mastering into SBus. Switch FF and Buffer order on non-tile masters into SBus. Buffer non-L2 side of splitter	2017-08-30 14:22:49 -07:00
devices	SystemBus: use a full buffer on slaves	2017-08-26 02:47:04 -07:00
diplomacy	TLBuffer: Add a nodedebugstring for quick browsing of the properties of the buffer.	2017-08-29 10:36:46 -07:00
groundtest	chiplink: adjust bus view to include the splitter (#886)	2017-07-24 21:41:17 -07:00
jtag	Use chisel3 Clock() method.	2017-07-07 14:16:39 -07:00
regmapper	add cloneType to RegisterWriteIO and RegisterReadIO (#874)	2017-07-18 18:52:31 -07:00
rocket	Remove redundant check in interrupt priority encoding	2017-08-17 22:23:42 -07:00
system	tilelink: add mask rom	2017-07-31 21:34:04 -07:00
tile	Fixing requirements for PAddrBits (#961)	2017-08-17 11:53:59 -07:00
tilelink	TLBuffer: Add a nodedebugstring for quick browsing of the properties of the buffer.	2017-08-29 10:36:46 -07:00
unittest	Combine Coreplex and System Module Hierarchies (#875)	2017-07-23 08:31:04 -07:00
util	HeterogenousBag: empty bags were being combined! (#956)	2017-08-14 15:48:42 -07:00