rocket-chip/src/main/scala at e76e0f6dcec4ee38a1c263c071bc34d095bb606f - rocket-chip - Tiband Gitea

riscv/rocket-chip

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T

History

Wesley W. Terpstra e76e0f6dce interrupts: add debugstring to nodes to show sync depth in graphml

2017-10-26 13:58:52 -07:00

..

crossings: deprecate non-island crossing style

2017-10-26 13:58:52 -07:00

config: fix warning

2017-09-22 14:58:36 -07:00

axi4: now also supports the island pattern

2017-10-26 13:04:32 -07:00

coreplex: tidy up interrupt crossings

2017-10-26 13:04:32 -07:00

diplomacy: it possible for NodeHandles to put indirection on their attachment

2017-10-26 13:04:32 -07:00

coreplex: leverage improved := composition

2017-10-26 13:04:32 -07:00

interrupts: add debugstring to nodes to show sync depth in graphml

2017-10-26 13:58:52 -07:00

JTAG Coverage: Correct jtag_reset case

2017-10-09 09:54:15 -07:00

RegField: default argument for .bytes

2017-10-10 19:49:35 -07:00

IntNodes: moved from tilelink to their own package

2017-10-25 16:56:51 -07:00

Merge pull request #1039 from freechipsproject/tile-crossing-params

2017-10-11 17:12:03 -07:00

coreplex: refactor crossings to use node pattern

2017-10-26 13:04:32 -07:00

crossings: deprecate non-island crossing style

2017-10-26 13:58:52 -07:00

axi4: implement a diplomatic AXI4 clock crossing (#1049 )

2017-10-12 00:05:45 -07:00

util: delete old long-deprecated crossing code

2017-10-26 13:58:52 -07:00