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riscv
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rocket-chip
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e2755a0f0aa0d4a5d2a69394704651e3ca742ef0
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Andrew Waterman
e2755a0f0a
Work around zero-width wire limitation in HTIF
2016-05-25 20:39:53 -07:00
uncore
Work around zero-width wire limitation in HTIF
2016-05-25 20:39:53 -07:00
Description
Rocket Chip Generator (
https://github.com/freechipsproject/rocket-chip
)
13
MiB
Languages
Scala
93.1%
C++
2.1%
Python
2%
Makefile
1.2%
Verilog
0.8%
Other
0.7%