GuzTechandHenry Cook 8157cf1ede Perform integer division when parsing rocketchip.DefaultConfig.conf (#493)

2017-01-13 16:40:02 -08:00

..

.gitignore

Write test harness in Chisel

2016-08-15 23:27:27 -07:00

Makefile

Use PROJECT rather than MODEL in name of binary and generated src files.

2016-09-19 13:23:17 -07:00

Makefrag

Simplify AsyncResetReg

2016-10-08 21:29:40 -07:00

Makefrag-verilog

Use % in makefrag-verilog to prevent double firrtl execution (#452)

2016-11-25 01:50:01 -08:00

vlsi_mem_gen

Perform integer division when parsing rocketchip.DefaultConfig.conf (#493)

2017-01-13 16:40:02 -08:00