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rocket-chip/vsim
Andrew Waterman 7f429e8799 Simplify AsyncResetReg
No need for AsyncSetReg, as AsyncResetReg can be used exclusively with
inverted inputs.
2016-10-08 21:29:40 -07:00
..
.gitignore Write test harness in Chisel 2016-08-15 23:27:27 -07:00
Makefile Use PROJECT rather than MODEL in name of binary and generated src files. 2016-09-19 13:23:17 -07:00
Makefrag Simplify AsyncResetReg 2016-10-08 21:29:40 -07:00
Makefrag-verilog Provide a GeneratorApp object per user package. Extract RocketTestSuite from coreplex into rocketchip and provide GeneratorApp defaults for other target packages. 2016-09-22 15:59:29 -07:00
vlsi_mem_gen fix null statement in vsli_mem_gen ala firrtl#264 (#252) 2016-09-07 11:04:36 -07:00