John WrightandPalmer Dabbelt ba96ad2b38 Move N_CORES and MMIO_BASE to SCRFile instance in RocketChip

2016-02-27 16:24:45 -08:00

..

Backends.scala

new RocketChipBackend implementation

2014-09-25 06:47:12 -07:00

Configs.scala

Change MIF_DATA_BITS back to 64

2016-02-27 11:43:44 -08:00

DeviceSet.scala

implement DMA streaming functionality

2016-01-07 19:26:15 -08:00

DeviceTree.scala

Construct device tree ROM in MMIO region

2015-11-25 21:23:37 -08:00

Fpga.scala

move FPGA AXI to HTIF converter into Chisel module

2016-02-19 13:53:31 -08:00

Network.scala

fix more Chisel3 deprecations

2016-01-14 15:06:30 -08:00

RocketChip.scala

Move N_CORES and MMIO_BASE to SCRFile instance in RocketChip

2016-02-27 16:24:45 -08:00

TestBench.scala

get multichannel simulation working in emulator

2015-11-05 10:48:32 -08:00

TestConfigs.scala

Add Matthew Naylor's trace generator and AXE scripts

2016-02-24 14:39:11 -08:00

Testing.scala

make the asm suites ordered by their insertion order

2016-02-24 19:49:35 -08:00

Vlsi.scala

Generate and use SCR address header files

2016-02-17 15:23:18 -08:00

ZscaleChip.scala

make ZscaleChip work with new parameters framework

2015-10-25 10:24:39 -07:00