.. |
Arbiter.scala
|
tilelink2 Arbiter: there is only one winner
|
2016-10-13 17:02:17 -07:00 |
AtomicAutomata.scala
|
tilelink2 Arbiter: allow preemption of first beat
|
2016-10-13 17:02:17 -07:00 |
Buffer.scala
|
tilelink2: move general-purpose code out of tilelink2 package
|
2016-10-03 16:22:28 -07:00 |
Bundles.scala
|
tilelink2: switch to DecoupledIO syntax
|
2016-10-13 17:02:17 -07:00 |
Crossing.scala
|
tilelink2: use NodeHandle to restore Crossing.node API
|
2016-10-10 13:15:28 -07:00 |
Edges.scala
|
tilelink2: switch to DecoupledIO syntax
|
2016-10-13 17:02:17 -07:00 |
Example.scala
|
tilelink2: move general-purpose code out of tilelink2 package
|
2016-10-03 16:22:28 -07:00 |
Fragmenter.scala
|
tilelink2 Fragmenter: cope with Decoupled input
|
2016-10-13 17:02:17 -07:00 |
Fuzzer.scala
|
tilelink2 RAMModel: include name of test in output
|
2016-10-12 17:08:52 -07:00 |
HintHandler.scala
|
tilelink2 Arbiter: allow preemption of first beat
|
2016-10-13 17:02:17 -07:00 |
IntNodes.scala
|
tilelink2: move general-purpose code out of tilelink2 package
|
2016-10-03 16:22:28 -07:00 |
Isolation.scala
|
tilelink2: clarify use of Isolation
|
2016-10-10 13:13:32 -07:00 |
Legacy.scala
|
tilelink2: Legacy should preserve the access size (#378)
|
2016-10-03 17:25:31 -07:00 |
Monitor.scala
|
tilelink2 Monitor: enforce stricter transaction ordering
|
2016-10-13 17:02:17 -07:00 |
Nodes.scala
|
[tilelink2] allow TL monitors to be globally enabled or disabled (#392)
|
2016-10-09 12:34:10 -07:00 |
package.scala
|
tilelink2: add a rightOR to go with our leftOR
|
2016-10-11 22:38:02 -07:00 |
Parameters.scala
|
axi4 tilelink2: include minAlignment and maxAddress in slaves
|
2016-10-12 17:02:01 -07:00 |
RAMModel.scala
|
tilelink2 RAMModel: include name of test in output
|
2016-10-12 17:08:52 -07:00 |
RegisterRouter.scala
|
tilelink2 RegisterRouter: data path register is no longer required
|
2016-10-13 17:02:17 -07:00 |
RegisterRouterTest.scala
|
regmapper: eliminate race condition in RegisterCrossing bypass
|
2016-10-10 13:13:32 -07:00 |
SRAM.scala
|
tilelink2: move general-purpose code out of tilelink2 package
|
2016-10-03 16:22:28 -07:00 |
ToAXI4.scala
|
tilelink2 ToAXI4: no arbitration path register needed
|
2016-10-13 17:02:17 -07:00 |
WidthWidget.scala
|
tilelink2 WidthWidget: cope with Decoupled inputs
|
2016-10-13 17:02:17 -07:00 |
Xbar.scala
|
tilelink2 Arbiter: allow preemption of first beat
|
2016-10-13 17:02:17 -07:00 |