Andrew Waterman 9e6b86fe85 Fix a nasty replay bug ...

If a mispredicted branch was followed by an instruction dependent
on a load that missed in the cache, the mispredicted path would
be executed rather than the correct path. Fail.

Example broken code:

lw   x2, 0(x2)          # cache miss
beq  x3, x0, somewhere  # mispredicted branch
move x4, x2             # wrong-path instruction dependent on load miss

2012-01-24 03:40:01 -08:00

rocket/src/main/scala

Fix a nasty replay bug

2012-01-24 03:40:01 -08:00

Description

Rocket Chip Generator (https://github.com/freechipsproject/rocket-chip)

13 MiB

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