Henry Cook 1e54820f8c Merge remote-tracking branch 'origin/master' into unittest-config		2016-09-22 16:03:51 -07:00
..
.gitignore	Write test harness in Chisel	2016-08-15 23:27:27 -07:00
Makefile	Use PROJECT rather than MODEL in name of binary and generated src files.	2016-09-19 13:23:17 -07:00
Makefrag	replace verilog clock divider with one written in Chisel	2016-09-22 11:32:29 -07:00
Makefrag-verilog	Provide a GeneratorApp object per user package. Extract RocketTestSuite from coreplex into rocketchip and provide GeneratorApp defaults for other target packages.	2016-09-22 15:59:29 -07:00
vlsi_mem_gen	fix null statement in vsli_mem_gen ala firrtl#264 (#252)	2016-09-07 11:04:36 -07:00