Andrew Waterman 890528c641 Avoid data corruption under correctable tag error during flush ... This esoteric bug manifests if a tag-read error occurs when a FENCE.I is executed, even if the error was correctable. Subsequently, an attempt to flush a dirty line may flush the wrong line's data.		2017-11-29 16:09:44 -08:00
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amba	AXI4Xbar: reduce number of special cases	2017-11-14 15:09:09 -08:00
config	config: fix warning	2017-09-22 14:58:36 -07:00
coreplex	DTS: collect common DTS nodes and move timebase-frequency to cores	2017-11-20 18:09:57 -08:00
devices	debug: Remove workaround for Chisel 3 #527	2017-11-27 10:50:15 -08:00
diplomacy	DTS: collect common DTS nodes and move timebase-frequency to cores	2017-11-20 18:09:57 -08:00
groundtest	tile: put a BasicBusBlocker inside RocketTile (#1115)	2017-11-17 17:26:48 -08:00
interrupts	interrupts: Crossing should use asynchronously reset registers (#1080)	2017-10-31 16:29:06 -07:00
jtag	JTAG: Use sorted map for stability (#1073)	2017-10-31 15:33:41 -07:00
regmapper	RegField: default argument for .bytes	2017-10-10 19:49:35 -07:00
rocket	Avoid data corruption under correctable tag error during flush	2017-11-29 16:09:44 -08:00
system	coreplex: WithStatelessBridge => WithIncoherentTiles (#1092)	2017-11-07 13:47:56 -08:00
tile	DTS: collect common DTS nodes and move timebase-frequency to cores	2017-11-20 18:09:57 -08:00
tilelink	tilelink: don't pollute TLParamters with AtomicAutomata's implementation (#1111)	2017-11-14 17:49:10 -08:00
unittest	unittest: include AXI4Xbar in regression	2017-11-14 15:09:09 -08:00
util	Merge pull request #1098 from freechipsproject/frontend	2017-11-09 17:44:38 -08:00