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rocket-chip/src/main/scala/uncore/tilelink2
Henry Cook 2e8a40a23f diplomacy: Allow LazyModuleImps to be based on RawModules or MultiIOModules
And add a MonitorBase class to be connect's return type.
2017-06-13 13:55:27 -07:00
..
Arbiter.scala tilelink2: improve round robin arbiter QoR 2017-06-01 15:34:40 -07:00
AsyncCrossing.scala unittests: accept a configurable number of transactions to run 2017-05-17 14:02:59 -07:00
AtomicAutomata.scala diplomacy: improve PMA circuit QoR 2017-06-01 15:30:20 -07:00
Atomics.scala tilelink2: add a generic TL2 atomic evaulation unit 2017-04-14 15:13:39 -07:00
Broadcast.scala diplomacy: require masters to have a name 2017-06-02 15:52:20 -07:00
Buffer.scala TLBuffer: move TLBufferParams to diplomacy.BufferParams 2017-03-16 15:19:36 -07:00
Bundles.scala rocketchip: work-around ucb-bar/chisel3#472 2017-01-31 14:20:02 -08:00
CacheCork.scala TLCacheCork: unsafe flag now _really_ unsafe (#760) 2017-05-22 19:37:11 -07:00
Delayer.scala TLDelayer: insert noise on invalid cycles 2017-03-11 02:53:43 -08:00
Edges.scala tilelink2: define is{Request,Response} based on spec 2017-03-20 13:41:02 -07:00
Error.scala tilelink2: Error device for returning errors on demand 2017-05-01 22:53:02 -07:00
Example.scala uncore: add DTS meta-data for devices 2017-03-02 21:19:22 -08:00
FIFOFixer.scala tilelink2: FIFOFixer should NOT change client request status 2017-05-01 22:53:41 -07:00
Filter.scala uncore: switch to new diplomacy Node API 2017-01-29 15:54:45 -08:00
Fragmenter.scala diplomacy: require masters to have a name 2017-06-02 15:52:20 -07:00
Fuzzer.scala diplomacy: require masters to have a name 2017-06-02 15:52:20 -07:00
HintHandler.scala unittests: accept a configurable number of transactions to run 2017-05-17 14:02:59 -07:00
IntNodes.scala graphML: reverse interrupt arrows 2017-04-14 18:09:14 -07:00
Isolation.scala tilelink2: split suportsAcquire into T and B variants 2017-01-19 19:07:13 -08:00
Legacy.scala diplomacy: require masters to have a name 2017-06-02 15:52:20 -07:00
Metadata.scala rocketchip: work-around ucb-bar/chisel3#472 2017-01-31 14:20:02 -08:00
Monitor.scala diplomacy: Allow LazyModuleImps to be based on RawModules or MultiIOModules 2017-06-13 13:55:27 -07:00
Nodes.scala diplomacy: Allow LazyModuleImps to be based on RawModules or MultiIOModules 2017-06-13 13:55:27 -07:00
Parameters.scala diplomacy: require masters to have a name 2017-06-02 15:52:20 -07:00
RAMModel.scala tilelink2: RAMModel, use CRC16 to check AMO response 2017-04-14 15:13:40 -07:00
RationalCrossing.scala unittests: accept a configurable number of transactions to run 2017-05-17 14:02:59 -07:00
RegisterRouter.scala RegisterRouter: support devices with gaps 2017-03-20 14:49:22 -07:00
RegisterRouterTest.scala unittests: accept a configurable number of transactions to run 2017-05-17 14:02:59 -07:00
Repeater.scala copyright: ran scripts/modify-copyright 2016-11-27 22:15:43 -08:00
SRAM.scala unittests: accept a configurable number of transactions to run 2017-05-17 14:02:59 -07:00
SourceShrinker.scala diplomacy: require masters to have a name 2017-06-02 15:52:20 -07:00
TestRAM.scala unittests: accept a configurable number of transactions to run 2017-05-17 14:02:59 -07:00
ToAHB.scala diplomacy: require masters to have a name 2017-06-02 15:52:20 -07:00
ToAPB.scala diplomacy: require masters to have a name 2017-06-02 15:52:20 -07:00
ToAXI4.scala axi4: only block writes if SAME master has outstanding reads (#782) 2017-06-05 16:54:00 -07:00
WidthWidget.scala unittests: accept a configurable number of transactions to run 2017-05-17 14:02:59 -07:00
Xbar.scala Changed TLXbar arbitration policy to roundRobin (#781) 2017-06-05 10:20:28 -07:00
Zero.scala uncore: add DTS meta-data for devices 2017-03-02 21:19:22 -08:00
package.scala tilelink2: improve round robin arbiter QoR 2017-06-01 15:34:40 -07:00