Andrew Waterman 7eb73c325e fix signedness of zero fmul results ...

We were using the FMA unit to compute rs1 * rs2 + 0.0 for fmul,
which incorrectly computes +0.0 when rs1 * rs2 == -0.0.  Now we
add -0.0 if rs1*rs2 is negative.

2012-03-10 00:21:51 -08:00

rocket/src/main/scala

fix signedness of zero fmul results

2012-03-10 00:21:51 -08:00

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Rocket Chip Generator (https://github.com/freechipsproject/rocket-chip)

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