Andrew Waterman 742c05d6a7 Pipeline D$->I$ control paths ...

These stretch the miss latency by a cycle in exchange for slack.
The current implementation also adds a cycle to mul/div latency,
which can be worked around for more hardware (possibly gated by
the FastMulDiv option).

2016-05-13 17:07:28 -07:00

rocket

Pipeline D$->I$ control paths

2016-05-13 17:07:28 -07:00

Description

Rocket Chip Generator (https://github.com/freechipsproject/rocket-chip)

13 MiB

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