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riscv/rocket-chip
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6df42fc36078d6ff60c1610b6fb89b24d668f134
rocket-chip/src/main/scala
T
History
Wesley W. TerpstraandGitHub 4ba8acb4aa TLRAM: add support for ECC (#1304)
2018-03-22 14:27:43 -07:00
..
amba
coreplex => subsystem
2018-02-21 14:42:24 -08:00
config
config: remove deprecated Parameters.root
2018-01-30 11:52:44 -08:00
devices
Update Debug Module registers (#1296)
2018-03-20 14:01:22 -07:00
diplomacy
TLRAM: add support for ECC (#1304)
2018-03-22 14:27:43 -07:00
groundtest
buswrapper: remove buffer chains from api (#1303)
2018-03-21 23:44:05 -07:00
interrupts
diplomacy: provide a val name for all LazyModule constructions
2017-12-01 11:28:21 -08:00
jtag
Fix JTAG cover description (#1248)
2018-02-23 12:13:31 -08:00
regmapper
regmapper: refactor how json is emitted
2018-03-12 08:24:36 -07:00
rocket
Implement Hauser misa.C misalignment proposal (#1301)
2018-03-21 23:42:01 -07:00
subsystem
buswrapper: remove buffer chains from api (#1303)
2018-03-21 23:44:05 -07:00
system
subsystem: XSubsystemModule => XSubsystemModuleImp
2018-02-21 14:52:59 -08:00
tile
Align RoCCIO with new cloneType (#1270)
2018-03-06 17:53:51 -08:00
tilelink
TLRAM: add support for ECC (#1304)
2018-03-22 14:27:43 -07:00
unittest
TLRAM: add support for ECC (#1304)
2018-03-22 14:27:43 -07:00
util
ECC: support poison during encode (#1166)
2018-03-21 16:29:24 -07:00
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